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DS3065WP
3.3V, 8Mb, Nonvolatile SRAM with Clock
AC ELECTRICAL CHARACTERISTICS (continued)
(V CC = 3.3V Q 0.3V, T A = -40 N C to +85 N C, unless otherwise noted.)
PARAMETER
Output High Impedance from
Deselection
SYMBOL
t OD
(Note 2)
CONDITIONS
MIN
TYP
MAX
40
UNITS
ns
Output Hold from Address
Write Cycle Time
t OH
t WC
5
100
ns
ns
Write Pulse Width
Address Setup Time
Write Recovery Time
Output High Impedance from WE
Output Active from WE
Data Setup Time
Data Hold Time
Chip-to-Chip Setup Time
t WP
t AW
t WR1
t WR2
t ODW
t OEW
t DS
t DH1
t DH2
t CCS
(Note 3)
(Note 4)
(Note 5)
(Note 2)
(Note 2)
(Note 6)
(Note 4)
(Note 5)
75
0
5
20
5
40
0
20
40
40
ns
ns
ns
ns
ns
ns
ns
ns
POWER-DOWN/POWER-UP TIMING
(T A = -40 N C to +85 N C, unless otherwise noted.)
PARAMETER
V CC Fail Detect to CE , CS , and
WE Inactive Time
SYMBOL
t PD
(Note 7)
CONDITIONS
MIN
TYP
MAX
1.5
UNITS
F s
V CC Slew from V TP to 0V
V CC Slew from 0V to V TP
V CC Valid to CE , CS , and WE
Inactive
V CC Valid to End of Write
Protection
t F
t R
t PU
t REC
150
150
2
125
F s
F s
ms
ms
DATA RETENTION
(T A = +25 N C, unless otherwise noted.)
PARAMETER
Expected Data-Retention Time
SYMBOL
t DR
(Notes 7, 8)
CONDITIONS
MIN
10
TYP
MAX
UNITS
Years
AC TEST CONDITIONS
Voltage Range on Any Pin Relative to Ground: -0.3V to +4.6V
Input Pulse Levels: V IL = 0V, V IH = 2.7V
Input Pulse Rise and Fall Times: 5ns
Input and Output Timing Reference Level: 1.5V
Output Load: 1 TTL Gate + C L (100pF) including scope and jig
Maxim Integrated
3
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